Trademarks and registered trademarks are the property of their respective owners. #LOOPBACK CABLE ANALOG DEVICES LICENSE#No license is granted by implication or otherwise under any patent or patent rights of Analog Tel: 781.329.4700 Devices. Specifications subject to change without notice. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Information furnished by Analog Devices is believed to be accurate and reliable. #LOOPBACK CABLE ANALOG DEVICES GENERATOR#Description Frame Generator and CheckerĬable Diagnostics Link/Activity LED Small package 40-lead (6 mm x 6 mm) LFCSP Industrial temperature range -40☌ to 105☌ APPLICATIONS Process Control Factory Automation Building Automation Rev. Integrated power supply monitoring and POR Start of packet detection for IEEE 1588 time stamp support Table 1. The ADIN1100 is available in a 6 mm x 6 mm 40-ld package. Interface is compatible with both the IEEE 802.3 StandardĬlause 22 and Clause 45 management frame structures.ģ.3 V/2.5 V/1.8 V MAC interface VDDIO supply Information in the PHY core management registers. #LOOPBACK CABLE ANALOG DEVICES SERIAL#The MDIO interface is a two-wire serial interface forĬommunication between a host processor or MAC and theĪDIN1100, thereby allowing access to control and status The ADIN1100 has an integrated voltage supply monitoringĬircuit and power on reset circuitry to improve system levelġ700 meters+ with 2.4 V pk-pk Low power consumption The 1.0 V pk-pk operating mode, external termination resistorsĪnd independent Rx/Tx pins make the ADIN1100 suited to IEC 6 electrical fast transient (EFT) (±4 kV) IEC 6 ESD (☘ kV contact discharge) With the lower voltage option supporting the 1.0 V pk-pk Single supply 1.8 V/3.3 V operation (mode dependent) The 2.4 V pk-pk operating mode defined in the standard andĬan operate from a single power supply rail of 1.8V or 3.3V, The PHY core supports the 1.0 V pk-pk operating mode andĢ5 MHz crystal oscillator/25 MHz external clock input Register and subsystem registers, as well as the MAC interfaceĪnd control logic to manage the reset and clock control and pin Unmanaged configuration using pin strapping including: Output clock buffering, the management interface control PHY core with all the associated analog circuitry, input and Transceiver designed for industrial Ethernet applications and isĬompliant with the IEEE 802.3cg Ethernet standard for long Supports 1.0 V pk-pk & 2.4 V pk-pk transmit levels The ADIN1100 is a low power single port 10BASE-T1L Robust, Industrial, Low Power 10BASE-T1L Ethernet PHY Preliminary Technical Data ADIN1100 FEATURES GENERAL DESCRIPTION 10BASE-T1L IEEE® Std 802.3cg-2019TM compliant
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